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september 2015 ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1. 4 FAN6224 sy nchronous rectification controller for flyback and forward freewheeling rectification FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification features ? mwsaver ? technology: - internal green m ode to stop sr switching for lower no-load power consumption - 300 ? a ultra-low green mode operating current ? synchronous rectification controller ? suited for high-side and l ow -side of flyback converters in qr, dcm , and ccm operation ? suited for forward freewheeling rectification ? pwm frequency tracking with secondary-side winding voltage detection ? 140 khz maximum operation frequency ? v dd p in over-voltage protection (ovp) ? lpc pin open/short protection ? res pin o pen/ short protection ? rp pin o pen/ short protection ? internal over-temperature protection (otp) ? sop-8 package available applications ? ac -dc nb adapters ? open-frame smps description FAN6224 is a secondary-side synchronous rectification (sr) controller to drive sr mosfet for improv ed efficiency. the ic is suitable for flyback converters and forward freewheeling rectification. FAN6224 can be applied i n continuous or discontinuous conduction mode (ccm and dcm) and quasi-resonant (qr) flyback converters based on a proprietary linear-predict timing-control technique . the benefits of this technique include a simple control method without current-sense circuitry to accomplish noise immunity. with pwm frequency tracking and secondary-side winding voltage detection, FAN6224 can operate in both fixed- and variable-frequency systems up to 140khz. FAN6224 detects output load condition and determines adjustable loading levels for green mode. in green mode, the sr controller stops all sr switching operation to reduce the operating current. power consumption is maintain ed at a minimum level in light-load condition. ordering information part number operating temperature range packa ge packing method FAN6224m - 40 c to +105c 8-lead, small outline package (sop-8) tape & reel ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 2 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification typical application diagrams v in q 1 vdd res agnd gnd lpc v out FAN6224 r 1 r 2 r 3 gate 8 3 5 7 6 4 q 2 r 4 i sr v det v lpc v res 1 r rp c rp rp n 1 n 2 i sr v det v lpc v res v out v in q 1 n 1 q 2 n 2 n 3 vdd res agnd gnd lpc FAN6224 r 3 r 4 r 1 gate 8 3 5 7 6 4 r 2 1 r rp c rp rp figure 1. flyback l ow -side sr figure 2. flyback h igh -side sr vdd res agnd gnd lpc v out v in FAN6224 r 1 r 2 r 3 q 1 gate 8 3 5 7 6 4 q 3 r 4 q 2 1 r rp rp c rp v lpc v res v det i sr figure 3. forward freewheeling rectification ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 3 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification internal block diagram + - 1a/v vdd lpc enable 0. 256 a/v s r qq 3 4 gnd gate drive pwm block ovp green mode causal function reset 2 6 agnd agnd 7 res calculate v lpc-en + - + - + - blanking reset 5 rp 1 gate maximum period gate expand limit 8 internal otp fault timing protection s&h t lpc-en v lpc-en setting high/low frequency mode t green-on/off + - protection i chr c t i dischr v ct 27.5v/26v 10.5v/10.1v internal bias timing calculation adjustable green mode 0.35v 2.5v 1.45v s&h protection reset t green-on/off s&h v ct figure 4. block diagram ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 4 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification marking information zxytt 6224 tm figure 5. top mark pin configuration vdd FAN6224 1 2 3 4 5 6 7 8 lpc agnd res rp gate agnd gnd figure 6. pin configuration pin definitions pin # name description 1 rp programmable . a resistor paralleled with a capacitor is connected to rp pin and reference ground externally. the timing to enter / exit green mode is pr ogrammable by the resistor, while the range of operating frequency is programmable by the capacito r. 2 , 6 agnd signal ground. 3 gate driver output . the totem-pole output driver for driving the power mosfet. 4 gnd ground . mosfet source connection. 5 vdd power supply . the threshold voltages for startup and turn-off are 10.5 v and 10.1 v, respectively. 7 res reset control of linear predict . res pin is used to detect output voltage level thr ough a voltage divider. an internal current source, i dischr , is modulated by this voltage level on the res pin. 8 lpc winding detection . this pin is used to detect the voltage on the winding during the on-time period of the primary gate. : fairchild l ogo z: plant code x: year code y: week code tt: die run code t : package type (m = sop) m : manufacturing flow c ode ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 5 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification absolute maximum ratings stresses exceeding the absolute maximum ratings may dama ge the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the reco mmended operating conditions may affect device reliability . the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v dd dc supply voltage 30 v v lpc voltage on lpc p in (t a =25 c) -0.3 7 .0 v v res voltage on res p in (continuously in -0.5 v) (t a =25c) -1.5 7 .0 v v rp voltage on rp p in (t a =25c) -0.3 7 .0 v p d power dissipation (t a =25 c) 0.8 w ja thermal resistance (junction- to -air) 151 c /w jc thermal resistance (junction- to -case) 58 c /w t stg storage temperature range - 55 150 c t l lead temperature (soldering) 10 s 260 c esd electrostatic discharge capability human body model, jesd22-a114 5 500 v charged device model, jesd22-c101 2 000 notes: 1. stresses beyond those listed under absolute maximum ratin gs may cause permanent damage to the device. 2. all voltage values, except differential voltages, are given with res pect to gnd pin. recommended operating conditions the recommended operating conditions table defines the condi tions for actual device operation. recommended operating conditions are specified to ensure optimal perfo rmance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum rating s. symbol parameter condition min. max. unit v lpc voltage on lpc p in continuous operation 4.8 v v res voltage on res p in 4.8 v v rp voltage on rp p in 0.5 2.5 v ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 6 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification electrical characteristics v dd = 15 v and t a = 25 c , unless otherwise noted. symbol parameter condition min. typ. max. unit v op continuously operating voltage v dd -off v dd -o vp v v dd - on turn-on threshold voltage 9.5 10.5 11.5 v v dd -off turn-off threshold voltage 9.1 10 .1 11.1 v v dd -hyst hysteresis voltage for turn-on / turn-off threshold 0.1 0.7 v i dd - op operating current v dd =15 v, lpc= 65 k hz , c l =6000 pf 7 8 ma i dd -green operating current in green mode v dd =15 v 300 400 a v dd -ovp v dd over-voltage protection 26 .0 27.5 29 .0 v v dd -ovp-hyst hysteresis voltage for v dd ovp 1.1 1 .5 1.9 v t v dd -ovp v dd ovp debounce time (3) 100 s output driver for internal sr mosfet section v z output voltage maximum (clamp) 10 12 14 v v ol output voltage l ow v dd = 12 v, i o =50 ma 0.5 v v oh output voltage high v dd = 12 v, i o =50 ma 9 v t r rising time v dd =12 v, c l =6 nf, gate =2 v~9 v 30 70 120 ns t f falling time v dd =12 v, c l =6 nf, gate =9 v~2 v 20 50 100 ns t pd_high_lpc propagation delay to gate high (lpc trigger) t r :0%~10% , v dd = 12 v 150 250 ns t pd_low_lpc propagation delay to gate low (lpc trigger (3) t f :100%~90%,v dd = 12 v 150 ns t max-period limitation between lpc rising edge to gate falling edge f s =65 khz 24 .0 29.5 35 .0 s f s = 140 khz 12.5 15.5 18.5 lpc section t bnk blanking time for charging c t (3) 150 ns t lpc-smp lpc sampling timing of previous cycle f s =65 khz , r rp = 75 k ? ~200 k ? , c rp = 100 nf 0.9 1.1 1.3 s f s =1 40 khz , r rp = 75 k ? ~200 k ? , c rp =1 nf 0.5 0.6 0.7 s v lpc-source lower clamp voltage source i lpc =10 a 0 0.1 0.2 v v lpc-high- en threshold voltage for lpc to enable sr v lpc-high >v lpc-high- en , sr e nable 1.38 1.45 1.54 v v en -clamp sr enable threshold clamp voltage (3) v lpc- en =2 .5 v at v lpc-high >3 v 2.5 v v lpc- th -high threshold voltage on lpc rising e dge (3) 1.22 v v lpc-clamp-h v lpc high clamping voltage v lpc >v lpc-clamp-h 5.7 6.2 6.7 v v lpc-dis threshold voltage of v lpc to disable sr gate switching v lpc >v lpc-dis 4. 8 5.5 v t lpc- en -res no lpc signal, reset v lpc- en (3) 95 ? s continued on the following page ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 7 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification electrical characteristics (continued) v dd = 15 v and t a = 25 c , unless otherwise noted. symbol parameter condition min. typ. max. unit res section t res-smp v res sampling time (3) t sr_gate =5 s 2.5 s v res- en threshold voltage of v res to enable sr gate switching v res >v res- en 1. 3 1. 6 2 .0 v v res-clamp-h v res high clamping voltage v res >v res-clamp-h 5.7 6.2 6.7 v k res-drop v res drop protection ratio (3) v res [n +1 ] ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 8 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification electrical characteristics v dd =15 v and t a = 25 , unless otherwise noted. symbol parameter condition min. typ. max. unit operation frequency setting section v crp - th threshold voltage for high / low frequency determination (3) set v rp > v crp - th for higher operati ng frequency 0.35 v t crp - th debounce time for high / l ow frequency determination (3) 170 s i rp -source rp pin source current 8.5 9.5 10.5 a casual function section ? t dead-causal sr turn-o ff d ead time by causal function f s =65 k hz , (r rp =75 k ? ~200 k ? , c rp =100 nf) 480 680 880 ns f s =1 40 k hz , (r rp =75 k ? ~200 k ? , c rp =1 nf) 350 500 650 ns t causal-fault if t s-pwm (n+1) > t causal x t s-pwm (n), sr stops switching & enters green m ode f s =65 khz to 140 k hz 130 1 50 170 % t causal_leave (assume sr triggers fault causal protection) if lpc rises twice during t causal_leave and previous on-time of v lpc-high is longer than t lpc- en , then sr leaves fault causal protection (3) 5.3 s t dead-cfr once cfr is triggered, sr terminates & forces sr to enter green mode (the last time from sr gate falling to lpc rising) (3) causal function regulator (cfr) 70 ns internal over-temperature protection for otp ? t otp internal threshold temperature for otp (3) 140 c t otp-hyst hysteresis temperature for internal otp (3) 20 c note: 3. guaranteed by design ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 9 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification typical performance characteristics figure 7. v dd - on vs. temperature figure 8. v dd -o ff vs. temperature figure 9. t green-off vs. temperature figure 10. t green-off vs. temperature figure 11. i rp -source vs. temperature figure 12. i dd -green vs. temperature ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 10 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification typical performance characteristics (continued) figure 13. t dead-causal vs. temperature figure 14. t dead-causal vs. temperature figure 15. v res- en vs. temperature figure 16. ratio lpc-res vs. temperature figure 17. t lpc- en vs. temperature figure 18. t lpc- en vs. temperature ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 11 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification typical performance characteristics (continued) figure 19. t max-period vs. temperature figure 20. t max-period vs. temperature figure 21. v lpc-source vs. temperature figure 22. v res-source vs. temperature figure 23. t green- on vs. r rp figure 24. t green-o ff vs. r rp ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 12 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification functional description v out v det i m v in /n primary mosfet v gs synchr onous rectifier mosfet v ct v lpc t pm.on i ds i sr /n v in /n+v out t l.dis t ct.dis body diode of sr mosfet body diode of sr mosfet v lpc-th-high 0.875v lpc-high v lpc-high i ds primary mosfet i m,av i m,max i m,min v out v det i m v in /n primary mosfet v gs synchr onous rectifier mosfet v ct v lpc t pm.on i ds i sr /n v in /n+v out t l.dis t ct.dis body diode of sr mosfet body diode of sr mosfet v lpc-th-high 0.875v lpc-high v lpc-high blanking time (t lpc-en ) i m,max i m,min v res v res v res-en v res-en figure 25. waveforms of linear-predict timing control in ccm and dcm / qr flyback for l ow -side application ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 13 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification v out v det i m v in /n primary mosfet v gs synchr onous rectifier mosfet v ct v lpc t pm.on i ds i sr /n v in /n+v out t l.dis t ct.dis body diode of sr mosfet body diode of sr mosfet v lpc-th-high v lpc-high i ds primary mosfet i m,av i m,max i m,min v out v det i m v in /n primary mosfet v gs synchr onous rectifier mosfet v ct v lpc t pm.on i ds i sr /n v in /n+v out t l.dis t ct.dis body diode of sr mosfet body diode of sr mosfet v lpc-th-high v lpc-en = 0.875v lpc-high v lpc-high blanking time (t lpc-en ) i m,max i m,min v res v res v res-en v res-en t res-smp t res-smp v lpc-en = 0.875v lpc-high figure 26. waveforms of linear-predict timing control in ccm and dcm / qr flyback for h igh -side application linear predict timing control the sr mosfet turn-off timing is determined by linear-predict timing control and the operation princip le is based on the volt-second balance theorem, which states: the inductor average voltage is zero during a switching period in steady state, so the charge voltage and charge time product is equal to the discharge vo ltage and discharge time product. in flyback converters, the charge voltage on the magnetizing inductor is input voltage (v in ), while the discharge voltage is reflected output voltage ( nv out ), as the typical waveforms show in figure 25. the following equation can be drawn: .. in pm on out l dis v t n v t ? ? ? ? (1) where t pm,on is inductor charge time; t l,dis is inductor discharge time; and n is turn ratio of primary windings (n 1 ) to secondary windings (n 2 ) . FAN6224 uses the lpc and res pins with two sets of voltage dividers to sense det voltage (v det ) and output voltage (v out ), respectively; so v in /n, t pm.on , and v out can be obtained. as a result, t l,dis , which is the on-time of sr mosfet, can be predicted by equation 1. as shown in figure 25 , t he sr mosfet is turned on when the sr mosfet body diode starts conducting and det voltage drops to zero. the sr mosfet is turned off by linear-predict timing control. circuit realization the linear-predict timing-control circuit generates a replica (v ct ) of the magnetizing current of the flyback transformer using an internal timing capacitor (c t ), as shown in figure 27. using the internal capacitor voltage, the inductor discharge time (t l.dis ) can be detected indirectly, as shown in figure 25. when c t is discharged to zero, the sr controller turns off the sr mosfet. ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 14 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification 1a/v v ct 8 lpc 0.256a/v sr qq + - c t i chr i dischr v lpc-th 7 res v ct turn off sr gate turn on sr gate at the falling edge v lpc sr gate r 1 r 2 r 3 r 4 v det v out figure 27. simplified linear-predict block the voltage-second balance equation for the primary - side inductance of the flyback converter is given in equation (1) . inductor current discharge time is given as: . . in pm on l dis out vt t nv ? ? ? (2) the voltage scale-down ratio between res and lpc is defined as k below: ? ? ? ? 4 3 4 2 1 2 / / r r r k r r r ? ? ? (3) during t pm.on , the charge current of c t is i chr -i dichr , while during t l.dis , the discharge current is i dichr . as a result, the current-second balance equation for internal timing capacitor (c t ) can be derived from: .. 3.9 ( ( ) ) in out out pm on out ct dis v v v t v t kn ? ? ? ? ? ? (4) therefore, the discharge time of c t is given as: . . 3.9 ( ( ) ) in out out pm on ct dis out v v v t kn t v ? ? ? ? ? (5) when the voltage scale-down ratio between lpc and res (k) is 3.9, the discharge time of c t (t ct.dis ) is the same as inductor current discharge time (t l.dis ). however, considering the tolerance of voltage divider resistors and internal circuit, the scale-down ratio (k) should be larger than 3.9 to guarantee that t ct.dis is shorter than t l.dis . it is typical to set k around 4 .0 ~ 4. 5. referring to figure 25, when lpc voltage is higher than v lpc- en over a period of blanking time (t lpc- en ) and lower than v lpc- th -high (1.22 v), then sr mosfet can be triggered. therefore, v lpc- en must be lager than v lpc- th -high or the sr mosfet cannot be turned on. as a result, when designing the voltage divider of the lpc, considering the tolerance, r 1 and r 2 should satisfy the equation: 54 1 2 1 2 . ) ( . ? ? ? ? out min in v n v r r r (6) on the other hand, there is also a threshold voltage, v r es - en , for res pin to enable sr switching, hence r 3 and r 4 must satisfy: 3 34 2 out r v rr ?? ? (7) in addition, considering the linear operati ng range, lpc and res voltage should be under 4.8 v, and therefore: 2. 12 ( ) 4.8 in max out rv v r r n ? ? ? ? (8) 4 34 4.8 out r v rr ?? ? (9) for high -side applications , as shown in figure 2, an extra auxiliary winding (n 3 ) is used to supply voltage for controller. to detect output voltage, the res pin is connected to the auxiliary winding through a set of voltage dividers . as figure 26 shows, v res is proportional to v out when sr mosfet or its body diode conducts. therefore, information of v out is sampled at t res-smp after the primary-side mosfet turns off. as a result, equation (4) can be rewritten as: .. 3.9 ( ( ) ) ' in out out pm on out ct dis v v v t v t k n n ? ? ? ? ? ? ? ( 10 ) where n is the turn ratio of auxiliary windings (n 3 ) to secondary windings (n 2 ) . the discharge time of c t can be obtained as : . . 3.9 ( ( ) ) ' in out out pm on ct dis out v v v t k n n t v ? ? ? ? ? ? ( 11 ) therefore, when the voltage scale-down ratio (k) and turn ratio (n ) product is 3.9; the discharge time, t ct.dis , is the same as inductor current discharge time, t l.dis . to guarantee t ct.dis is shorter than t l.dis , the k and n product should be larger than 3.9. it is typical to set the product around 4 .0 ~4.5. when designing the voltage divider of lpc, the consideration is the same as that of low -side application, which means that the linear operating range, equations (6) and (8) must be satisfied. however , when determining the voltage divider of res, note that turn ratio n must be taken into consideration and so that equation (7) and (9) are mo dified as: 4 34 '2 out r nv rr ? ? ? ? ( 12 ) 4 34 ' 4.8 out r nv rr ? ? ? ? ( 13 ) ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 15 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification ccm operation t he typical waveforms of ccm operation in steady state are shown as right side of figure 25 and figure 26 . w hen the primary-side mosfet is turned on, the energy is stored in l m . during the on-time of the primary-side mosfet (t pm.on ) , the magnetizing current (i m ) increases linearly from i m,min to i m,max . meanwhile, internal timing capacitor (c t ) is charged by current source (i chr -i dichr ) proportional to v in , so v ct also increases linearly. when the primary-side mosfet is turned off, the energy stored in l m is released t o the output. du ring the inductor discharge time (t l.dis ) , the magnetizing current (i m ) decreases linearly from i m,max to i m,min . at the same time, the internal timing capacitor (c t ) is discharged by current source (i dischr ) proportional to v out , so v ct also decreases linearly. to guarantee the proper op eration of sr, it is important to turn off the sr mosfet just before sr current reaches i m,min so that the body diode of the sr mosfet is naturally turned off. dcm / qr operation in dcm / qr operation, when primary-side mosfet is turned off, the energy stored in l m is fully released to the output at the turn-off timing of primary-side mosfet. therefore, the det voltage continues resonating until the primary-side mosfet is turned on, as depicted in figure 25. while det voltage i s resonating, det voltage and lpc voltage drop to zero by resonance, which can trigger the turn-on of the sr mosfet. to prevent fault triggering of the sr mosfet in dcm operation, a blanking time is introduced to lpc voltage. the sr mosfet is not turned on even when lpc voltage drops below v lpc- th - high unless lpc voltage stays above 0.8 75 v lpc-high longer than the blanking time (t lpc- en ). the turn- on timing of the sr mofet is inhibited by gate inhibit time (t inhibit ), once the sr mosfet turns off, to preven t fault triggering. mwsaver ? technology green-mode operation to minimize the power consumption at light-load condition, the sr circuit is disabled when the load decreases. as illustrated in figure 28, the discharge times of th e inductor and internal timing capacitor decrease as load decreases. if the discharge time of the internal timing capacitor (t ct.dis ) is shorter than t green- on for more than three cycles, then the sr circuit enters green mode. once FAN6224 enters green mode , the sr mosfet stops switching and the major internal block is shut down to further reduce the operating current of the sr controller . in green mode , the operating current reduces to 300 a. this allows power supplies to meet stringent power conservation requirements. when the discharge time of the internal capacitor is longer than t green-o ff for more than fifteen cycles, the sr circuit is enabled and resumes the normal operation, as shown in figure 29. t o enhance flexibility of design, t green- on and t green-off are adjustable by the external resistor of the rp pin within a certain range. as shown in figure 30, larger r rp resistance corresponds to longer t green- on and t green-off , and vice versa. therefore, by setting different resistance of r rp , the loading of entering and exiting green mode is adjustable. i m sr gate 1.9s~4.4s 3 times green mode normal mode 1.9s~4.4s 1.9s~4.4s t t figure 28. entering green mode t i m sr gate 3.3s~5.9s 15 times green mode normal mode 3.3s~5.9s 3.3s~5.9s t figure 29. resuming normal operation 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 50 70 90 110 130 150 170 190 210 230 t green-on t green-off r rp (k ) t ct.dis ( ? s) figure 30. adjustable t green- on and t green-off ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 16 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification selection of operating frequency for different operating frequency range, internal parameters of the sr controller should be different to optimize signal processing. the capacitor of the rp pin (c rp ) is used to determine the op erating frequency range of the sr controller. for low switching frequency systems (< 100 khz), c rp is recommended as 10 nf; for high switching frequency systems (100 k~ 140 khz), c rp is recommended as 1nf. causal function causal function is utilized to limit the time interval (t sr - max ) from the rising edge of v lpc to the falling edge of the sr gate. as shown in figure 31, t sr -max is limited to previous switching period (t s-pwm ) minus a dead time, say t dead-causal . when the system operates at fixed frequency, whether voltage-second balance theorem can be applied or not , causal function can guarantee reliable operation. t v lpc sr gate v ct sr on-time t s-pwm t sr-max = t s-pwm C t dead-causal sr gate is turned off by causal function tt figure 31. causal function operation fault causal timing protection fault causal timing protection is utilized to disable the sr gate under some abnormal conditions. once the switching period (t s-pwm [n]) is longer than 150% of previous switching period (t s-pwm [n-1]), the sr gate is disabled and enters green mode, as shown in figure 32 . since the rising edge of v lpc among switching periods (t s-pwm ) is tracked for causal function, the accuracy of switching period is important. therefore, if the detected switching period has a serious variation, the sr gate is terminated to prevent fault trigger. t v lpc sr gate disable sr gate & enter green mode t s-pwm [n-1] t s-pwm [n] > 1.5xt s-pwm [n-1] t figure 32. fault causal timing protection gate expansion limit protection gate expansion limit protection controls the on -time expansion of the sr mosfet. once the discharge time of the internal timing capacitor (t dis.ct ) is longer than 1 20 % of the pr evious on-time of the sr mosfet (t on - sr [n-1]); t on - sr [n] is limited to 1 20 % of t on - sr [n-1], as shown in figure 33. when output load changes rapidly from light load to heavy load, voltage-second balance theorem may not be applied. in this transient state, gate expand limit protection is activated to prevent overlap between the sr gate and the pwm gate. t on-sr [n-1] v lpc sr gate v ct t on-sr [n]= t on-sr [n-1]*120% t dis.ct [n] t dis.ct [n-1] tt t sr gate is limited to 120% of t on-sr [n-1] figure 33. gate expand limit protection res dropping protection re s dropping protection prevents v res dropping too much within a cycle. the v res is sampled as a reference voltage, v res , on v lpc rising edge. once v res drops below 85 % of v res , the sr gate is turned off immediately, as shown in figure 34. when output voltage drops rapidly within a switching cycle, voltage- second balance may not be applied; res dropping protection is activated to prevent overlap. v lpc sr gate v res v res sr gate is turned off immediately 0.85*v res tt t figure 34. v res dropping protection lpc width expansion / shrink protection lpc width expansion and shrink protection is utilized to disable the sr mosfet switching under some abnormal conditions. as figure 35 shows, once the lpc pulse width (t lpc [n]) is longer than that of previous cycle (t lpc [n - 1] ) for t lpc- exp -lmt , the lpc width expansion protection is triggered and sr mosfet switching is terminated immediately. figure 36 shows the timing diagram of lpc width shrink protection. once t lpc [n] is shorter than t lpc [n - 1] , the sr mosfet switching also shuts down immediately. ? 2013 fairchild semiconductor corporation www.fairchildsemi.com FAN6224 ? rev. 1.4 17 FAN6224 synchronous rectification controller for flyback and forward freewheeling rectification t v lpc sr gate t lpc [n-1] t lpc [n] sr gate off t figure 35. v lpc width expand protection t v lpc sr gate t lpc [n-1] t lpc [n] sr gate off t figure 36. v lpc width shrink protection over-time protection generally, the minimum operating frequency of pwm controller in normal status is above 65 khz (65~140 khz). in FAN6224, there are two over-time protections that force the sr controller to go into green mode. as shown in upper part of figure 37 , the first one is when the time between lpc pulses (from lpc falling edge to rising edge) is longer than 95 us. this is typically triggered when the primary side controller operates in burst mode operation. to minimize the power consumption, FAN6224 enters into green mode in this condition. this green mode is also triggered when the lcp voltage divider is malfunctioning. another condition is when the time duration from sr turn-off to sr turn-on is longer than 75us as shown in lower part of figure 37. this happens when the pwm controller in the primary side goes into burst mode operation at light load condition. t v lpc disable sr gate & enter green mode t t sr-gate < 75us t sr-gate > 75us t lpc < 95us t lpc > 95us v sr-gate v lpc v sr-gate v ct figure 37. over-time protection lpc pin open / short protection lpc-open protection: if v lpc is higher than v lpc-dis for longer than debounce time t lpc-high , FAN6224 stops switching immediately and enters green mode. v lpc is clamped at 6 .2 v to avoid lpc pin damage. lpc-short protection: if v lpc is pulled to ground and the charging current of timing capacitor (c t ) is near zero, sr gate is not output. res pin open / short protection res-open protection: if v res is pulled to high level, the gate signal is extremely small and FAN6224 enters green mode. in addition, v res is clamped at 6 .2 v to avoid res pin damage. res-short protection: if v res is lower than v res-en (1.6 v), FAN6224 stops switching immediately and enters green mode. under-voltage lockout (uvlo) the power on and off v dd threshold voltages are fixed at 10 .5 v and 10.1 v, respectively . th e fan622 4 can be used in various output voltage applications . v dd pin over-voltage protection (ovp) over-voltage conditions are usually caused by an open feedback loop. v dd over-voltage protection prevents damage to the sr mosfet. when the voltage on the vdd pin exceeds 27.5 v; the sr controller stops switching the sr mosfet . over-temperature protection (otp) to prevent the sr gate from fault triggering in high temperatures, internal over-temperature protection is integrated in FAN6224 . if the temperature is over 140 c , the sr gate is disabled until the temperature drops below 120 c. www. onsemi.com 1 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductors product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? 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